SRAM & ROM Design

Design expertise in wide range of technology nodes
expertize in latest finfet technology in 14nm&16nm nodes
Expertize in popular 28nm technology node of most of the foundaries
Expertize in IOT designs, (customizing for low voltage, high density ,high speed applications)
Expertize in 40nm&65nm nodes
Experitize in older nodes ranging from 90nm to 180nm

Circuit Design Technology Bench Marking
Bitcell Analysis
Sense Amp Analysis
PPA Projection
Layout Design

Custom Mask Design from Scratch
Layout Porting across PDK
Physical Verification and Qualification
Special Focus on Memory Layouts

Characterization Design margining
Re characterization at new PVT corners
QA, packaging and release
Validation & Verification

Validation of the deliverable views
Functional Verification
Backend Verification
QA and Release

Memories : SRAM and ROM compilers, Register Files, Custom Memories
Technologies : 14nm, 20nm, 28nm, 32nm, 45nm and above
Tools : Industry Standard EDA tools

Team has the knowledge in all the Memory development activities

Bitcell Analysis
Sense Amplifier Analysis
STP Path analysis
Logic analysis
Variation analysis
Race Ratio Analysis
Power analysis
PPA Projection and Preliminary FE Views
Physical Updates
Margins and Characterization
Characterization and curve fitting
QA checks of the .libs
Validation,Verification and Release
Post Silicon Support


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